v2164 linear VCA problem

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neil.johnson
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Post by neil.johnson » Mon Dec 11, 2017 6:25 pm

guest wrote:also, fun fact, the noise on a 2164 is lower for higher input impedances. i just ran a series of tests to confirm this. the noise gets really bad, to the point of being unstable below 10k, so i wouldnt ever go lower than 30k. that resistor sets the gain of the internal feedback circuit. this feedback cancels out a lot of the noise (and i think is the main reason the 2164 is so low noise), and more gain in your feedback loop means tighter control. there isnt much improvement in noise for resistance above 100k.
Fun fact #2: I have a design on the bench which runs three 2164 gain cells in parallel, each driven by a 7k5 resistor. Driven off +/-15V rails in class A mode, and including the input buffer and output transimpedance converter I am measuring a THD+N of around 0.007% (audio bandwidth) with a 0dBu (775mV) sinewave input signal. Figures for 12V rails are slightly higher.

What I do find makes quite a bit of difference is the mode bias current. Ideally the bias current should track the input signal amplitude. This called sliding bias and used to be used in some high-end VCA-automated mixing desks and effects units (compressors).

Also at lower input resistor values you need to adjust the input compensator as otherwise the gain cells oscillate at high input levels - you can see this in the infamous figure 6 in the SSM2164 datasheet where it causes the sharp rise at the far right of the curves (the oscillation is lumped in as noise in the measurement). However in my case because of the input matching network I keep the individual levels down and so the dominant distortion mechanism is the op-amps hitting the rails. At higher input signal levels the THD+N rises, but not too bad; for example, at 2Vrms (+8.2dBu) I'm measuring around 0.027%, rising to around 0.15% at 5Vrms (+16dBu). This is work-in-progress so take these numbers with a pinch of salt.

One thing to be careful of with these parts is the performance spread is huge! Back to the datasheet, and figures 4 and 5 show that, for example, the THD+N has a spread of about 10:1. I've seen some of the raw measurements overlaid on a single plot and the curves are all over the place.

But then this device is built using fairly standard bipolar process, not some fancy process such as THAT has. Doug did a pretty good job of designing a VCA topology that is quite immune to process variation. It's just a shame that ADI killed off both the SSM2164 and it's predecessors (I suspect the 2164 was a last-ditch cut-n-shut job to cram four VCAs into a single package resulting in chopping off all the good bits to make it all fit into a cheap package). Good to see SSI getting the old team back together again and new 2164s coming out soon (very exciting times!!!): https://www.muffwiggler.com/forum/viewt ... 33#2703533

As for the issue of mixing multiple signals into one 2164 input, yes that is perfectly possible. You need to know the characteristics of the signals you're mixing (audio, or synth, correlated or not) to determine the resistor values to avoid driving the 2164 into distortion, but if it were me I would buffer the input signals and then use typical value resistors not noisy 100k monstrosities.

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Post by guest » Tue Dec 12, 2017 7:46 am

i think i understand why the input resistor doesnt matter too much for noise: the input resistance of the 2164 is pretty low. so its just your resistor in parallel with that input resistance which is 2Rpi = 2B*Vt/Ic. from my tests, it looks like the input stage feedback amp runs at 750uA. so, with a random guess of B = 200 we get 13k, which is around where i started seeing changes in behaviour on mine (30k was fine, 10k was not fine). i tried adjusting the compensation, and it didnt help. but, the noise was also mostly pickup noise, a distorted 60Hz with harmonics into the kHz range. ill need to investigate further.

and neil, thanks for posting up your test results. i ran a whole bunch of tests yesterday, and its great to have something to compare to. i will post them when im confident they represent reality.
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Post by guest » Tue Dec 12, 2017 11:09 am

i cleaned up the powersupply and did a better job of shielding, and mostly got the pickup noise to go away for smaller input resistors. im still seeing slight increase in noise floor, and apparent instability (which i cant stabilize) down at 1k input resistors. ill need to think on that some. why would it become more sensitive to pickup at lower impedance? thats usually the opposite of how that works.

i also did some reading on noise sources in transistors, and it turns out G^0.5 is the standard noise source model (the text i learned from always listed noise source as I^2 = 4kTR, etc, and i mentally dropped the ^2 i guess). so the real question then is, why does the noise floor in the lm13700 drop linearly (or near linearly)! answering one question always creates another. the thing that tipped me off was that the noise in the 2164 changed identically with MODE current and gain setting, which meant it was a strict function of current in the output transistors.
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Post by neil.johnson » Tue Dec 12, 2017 11:32 am

guest wrote:i cleaned up the powersupply and did a better job of shielding, and mostly got the pickup noise to go away for smaller input resistors. im still seeing slight increase in noise floor, and apparent instability (which i cant stabilize) down at 1k input resistors. ill need to think on that some. why would it become more sensitive to pickup at lower impedance? thats usually the opposite of how that works.
What model of the input do you have in mind? In fact, what model of operation of the 2164 do you have in mind? Are you still thinking it's like a Gilbert multiplier?
guest wrote:i also did some reading on noise sources in transistors, and it turns out G^0.5 is the standard noise source model (the text i learned from always listed noise source as I^2 = 4kTR, etc, and i mentally dropped the ^2 i guess). so the real question then is, why does the noise floor in the lm13700 drop linearly (or near linearly)! answering one question always creates another. the thing that tipped me off was that the noise in the 2164 changed identically with MODE current and gain setting, which meant it was a strict function of current in the output transistors.
One idea: in the LM13700 the Iabc (the control handle) is setting the bias current - more current more noise. In the 2164 the MODE current sets the bias current in the output stage (hence why sliding bias works) but that is not the control handle so changing the control does not affect the noise (much).

As for the behaviour at low input resistors, ask yourself what happens to the typical inverting op-amp circuit as you reduce the input resistor...

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Post by v8pete » Tue Dec 12, 2017 11:56 am

Has anybody had any luck building a working model of the 2164 in LTSpice, based on the Analog Devices datasheet figure?

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Post by J3RK » Tue Dec 12, 2017 12:14 pm

v8pete wrote:Has anybody had any luck building a working model of the 2164 in LTSpice, based on the Analog Devices datasheet figure?
Osamu Hoshuyama has two schematics for the internals on his page. A friend and I simply built up a sub-circuit based on them, and it seems to work quite well. We used modeling primitives for the current sources, and I removed the components that would normally be external to the IC (voltage to current conversion, input resistor / network, etc.)

I can't say that it's 100% accurate of course, but it does give expected results as far as verifying your overall circuit is in the right ballpark.

There are also some mathematical approximations out there (check the SDIY List archives for those) but I went with the schematic based model. Mine is in Proteus (which I don't know many people who use it) so it's not easily exported, or I'd post it.

Maybe Sound Semiconductor will make a model available when they release the new version of the IC.

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Post by slow_riot » Tue Dec 12, 2017 12:15 pm

v8pete wrote:Has anybody had any luck building a working model of the 2164 in LTSpice, based on the Analog Devices datasheet figure?
You could use the model for the THAT2180, which has closely similar behaviour (current in/current out, exponential response).

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Post by J3RK » Tue Dec 12, 2017 12:22 pm

slow_riot wrote:
v8pete wrote:Has anybody had any luck building a working model of the 2164 in LTSpice, based on the Analog Devices datasheet figure?
You could use the model for the THAT2180, which has closely similar behaviour (current in/current out, exponential response).
I've done that as well, and trimmed the sub-circuit to match the levels of the 2164. It actually works well enough. There's a Design Note on the THAT Corp site for substituting the 2162 for a 2164, and the conversions are all there.

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Post by v8pete » Tue Dec 12, 2017 12:34 pm

J3RK wrote:
v8pete wrote:Has anybody had any luck building a working model of the 2164 in LTSpice, based on the Analog Devices datasheet figure?
Osamu Hoshuyama has two schematics for the internals on his page. A friend and I simply built up a sub-circuit based on them, and it seems to work quite well. We used modeling primitives for the current sources, and I removed the components that would normally be external to the IC (voltage to current conversion, input resistor / network, etc.)

I can't say that it's 100% accurate of course, but it does give expected results as far as verifying your overall circuit is in the right ballpark.

There are also some mathematical approximations out there (check the SDIY List archives for those) but I went with the schematic based model. Mine is in Proteus (which I don't know many people who use it) so it's not easily exported, or I'd post it.

Maybe Sound Semiconductor will make a model available when they release the new version of the IC.

Thanks for that; had a look but couldn't see the particular schematics to which you're referring, so any chance you could post a link if you get a minute? - lots of really interesting ideas there, had forgotten how much!

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Post by v8pete » Tue Dec 12, 2017 12:43 pm

slow_riot wrote:
v8pete wrote:Has anybody had any luck building a working model of the 2164 in LTSpice, based on the Analog Devices datasheet figure?
You could use the model for the THAT2180, which has closely similar behavior (current in/current out, exponential response).
Yeah, they're functionally similar I think, but the SSM2164 uses the Frey VCA concepts as a basis (like the other AD SSM part, which I cant remember the part number for) , whereas THAT is a Blackmer cell (or at least I presume that it would be). At the moment I'm just really interested in the 2164 as the THAT parts are quite a bit more expensive, and also the package options are a bit of a pain (being either SIL or very tiny SMT).

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Post by neil.johnson » Tue Dec 12, 2017 12:47 pm

v8pete wrote:Yeah, they're functionally similar I think, but the SSM2164 uses the Frey VCA concepts as a basis (like the other AD SSM part, which I cant remember the part number for)
SSM2014 and then the SSM2018. Frey's OVCE is a really interesting device.

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Post by neil.johnson » Tue Dec 12, 2017 12:56 pm

v8pete wrote:Thanks for that; had a look but couldn't see the particular schematics to which you're referring, so any chance you could post a link if you get a minute? - lots of really interesting ideas there, had forgotten how much!
From here: http://www5b.biglobe.ne.jp/~houshu/synth/
To here: http://houshu.at.webry.info/200908/article_1.html

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Post by Dr. Sketch-n-Etch » Tue Dec 12, 2017 1:49 pm

This is how I model 2164 in Multisim:

Image

I've designed dozens of modules (and used tens of thousands of 2164 chips) based on this simple model. Here's an example of what 2164 looks like in a circuit model (one stage in an SVF):

Image
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Post by v8pete » Tue Dec 12, 2017 2:15 pm

Many thanks guys, really useful info.

So do we know who's behind the new Sound Semiconductor company - I was thinking it might be a Dave Rossum / Dave Smith collaboration perhaps?

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Post by v8pete » Tue Dec 12, 2017 3:46 pm

So, I've just been playing about with my previous LTSpice model of the SSM2164, and comparing this to the Osamu Hoshuyama schematic it's now apparent that Fig 23 of the AD datasheet has the current mirror mirror-imaged - so, you need to swap it back, or swap the input and output at the top of the two diff pairs (maybe the intention was to stop Uli Behringer from copying it, lol!).

Also, I didn't have the Darlington input stage - adding this gets rid of most of the whopping dc offset that I had before.

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Post by neil.johnson » Tue Dec 12, 2017 4:32 pm

v8pete wrote:So, I've just been playing about with my previous LTSpice model of the SSM2164, and comparing this to the Osamu Hoshuyama schematic it's now apparent that Fig 23 of the AD datasheet has the current mirror mirror-imaged - so, you need to swap it back, or swap the input and output at the top of the two diff pairs (maybe the intention was to stop Uli Behringer from copying it, lol!).

Also, I didn't have the Darlington input stage - adding this gets rid of most of the whopping dc offset that I had before.
A datasheet is a marketing document. Rarely will a silicon manufacturer put an accurate and detailed circuit diagram of their silicon IP. It's just there to give you an idea of what's inside, certainly not enough to allow you to go and create your own version.

Same for the figures - some of them are rather less measured and more guessed, although generally the right shape. They just need to be better than the competition.

It is worth digging out the datasheet for the SSM2018 as that has a bit more detail on the operation of the Frey cell.

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Post by neil.johnson » Tue Dec 12, 2017 4:59 pm

v8pete wrote:Many thanks guys, really useful info.

So do we know who's behind the new Sound Semiconductor company - I was thinking it might be a Dave Rossum / Dave Smith collaboration perhaps?
http://www.synthtopia.com/content/2017/ ... or-synths/

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Post by guest » Tue Dec 12, 2017 11:28 pm

neil.johnson wrote:As for the behaviour at low input resistors, ask yourself what happens to the typical inverting op-amp circuit as you reduce the input resistor...
i see your point here. any voltage noise at that node gets amplified. since the pickup at that node goes down as the gain goes up, my voltage noise is most likely coming through the powersupply (which is not attenuated with smaller R, so is just being amplified more) and not via pickup. i tend to think of that node from the perspective of the internal transistors. as that source resistor reduces, any internal variation in current creates a smaller voltage change at the amplifier input, thereby reducing the feedback gain, reducing its ability to hold the internal current constant.
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Post by guest » Tue Dec 12, 2017 11:35 pm

in regards to the hoshuyama model:

http://userdisk.webry.biglobe.ne.jp/000 ... M2164d.png

i found the bias currents to be exactly half of what he has listed (750uA for the internal OTA feedback amp, and 150uA for the default MODE current). the whole chip runs at ~5mA, so thats 1.25mA per amp. the MODE current gets passed through 2 current mirrors, so its effectively trippled (750 + 3*150 = 1.2mA).
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Post by J3RK » Wed Dec 13, 2017 11:19 am

guest wrote:in regards to the hoshuyama model:

http://userdisk.webry.biglobe.ne.jp/000 ... M2164d.png

i found the bias currents to be exactly half of what he has listed (750uA for the internal OTA feedback amp, and 150uA for the default MODE current). the whole chip runs at ~5mA, so thats 1.25mA per amp. the MODE current gets passed through 2 current mirrors, so its effectively trippled (750 + 3*150 = 1.2mA).
The one that I have right now is using 1500uA, 300uA, and 100uA for current sources. The response does seem VERY slightly off, but is more or less exponential, and reaching the correct voltage levels at the final (converted) output using the datasheet part values. I'll give your values a try, and see if they look more like what I was expecting.

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Post by guest » Wed Dec 13, 2017 12:33 pm

as neil points out, the internals are probably different from whats shown in the datasheet, which is probably what hoshuyama based their work on. for example, the MODE pin is always a 0V regardless of input current, so it cant be a PNP as shown. also, i just ran some more tests, and the overall current changes at a rate approximately equal to the current forced into the MODE pin, which means that the individual amplifiers see 1/4 of that at best. so the actual bias currents are probably much smaller than the MODE current.

also redid my clipping tests. output clips at ~5V into a 10k load, or 500uA. this means that the bias current for the input OTA is 1mA. this adds up if the MODE current is much less, as predicted above. total current draw is ~5.7mA with no external MODE current.

EDIT: never mind about the PNP business up above, it does have 1 Vbe drop. i made a mistake in my earlier measurements. i should have a more accurate model shortly.
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Post by J3RK » Wed Dec 13, 2017 2:05 pm

I've got a full IC part working in Proteus now. I don't have the mode pin modeled yet, but plan to add that to a new revision. (Actually it's modeled, I just need to remove my current source and map it to a pin on the package...) The next step for me is to try linearizing, as I think that will make any flaws more apparent. It looks decent just using a single datasheet example though.
Last edited by J3RK on Wed Dec 13, 2017 2:16 pm, edited 1 time in total.

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Post by guest » Wed Dec 13, 2017 2:11 pm

ok, the default MODE current is ~80uA. the transistor areas on the current sources for the diffpairs are 1/12th that of the main stack that converts the MODE current to a drive for them.
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Post by J3RK » Wed Dec 13, 2017 3:37 pm

I just linearized my test circuit, and it looks very good so far.

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Post by neil.johnson » Wed Dec 13, 2017 3:56 pm

J3RK wrote:I just linearized my test circuit, and it looks very good so far.
Do you know if your model would run in the free demo version?

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