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How to trigger a second gate after a certain amount of time?
MUFF WIGGLER Forum Index -> Modular Synth General Discussion  
Author How to trigger a second gate after a certain amount of time?
maaaks
I'm trying to figure out how I could create a gate out, only if another gate has been high for some specified time.

I'm thinking along the lines of gate 1 triggering a sawtooth envelope and then ANDing the gate and the envelope outputs (probably using a comparator on the envelope with a high threshold). But, I'd want some way to reset the envelope if gate 1 goes low.

Does that make any sense at all?
cptnal
How about passing your CV through a delay?
maaaks
Hmm I want it to be conditional, so if the gate isn't held for the whole of the time, the 2nd gate doesn't trigger...

Interesting idea though.
cptnal
In that case you could patch your original CV and the delayed CV into a logic module and tap the AND out. Would that work?
Gizmo
maaaks wrote:
I want it to be conditional, so if the gate isn't held for the whole of the time, the 2nd gate doesn't trigger...


Moon Modular 511AC operates in this manner. If the original gate disappears during the delay time interval, no delayed gate is produced. Also, resetting for the next gate input is automatic.
ersatzplanet
The ways I can think of require multiple other modules to do. Here are a few examples though:

run the first gate through a Slew limiter to turn it into a slowly rising voltage. Take this voltage and plug it into an envelope follower that has a variable threshold gate. It will out a gate when the voltage reaches the level you want and when the first gate goes away, everything will stop.

Take that slew out and run it into something like a Doepfer A-152 which takes a CV in and walks through 8 outputs as the voltage gets higher (there are other makers that make CV to gate controllers like this). Dial the CV input attenuator so the gates' top is at the out jack you want to use as a gate out and the slew adjust the time it takes to get there. Advantage is you can have more than one out gate.

Take the slew and run it into a A-144 Morphing controller. Pick the out at the time you want. Although it won't be a gate, many gate inputs are threshold dependent and it might work. Uzi can use if as an AR envelope if not.

The slewed voltage into a window comparator or threshold detector is what you really want. I am sure there are many modules that do this sort of thing, like I'm sure that Maths could do this all internally if patched correctly.
maaaks
Thanks for the suggestions.
I think gate -> slew -> comparator seems like the simplest solution.

I'll give it a try tonight!
nanners
NotHerbert
If I'm understanding this correctly, couldn't you just use Maths or something similar? Put your gate into ch.1 in, adjust the rise time to get the delay you want, and use the EOR as your 2nd gate.
The Junglechrist
NotHerbert wrote:
If I'm understanding this correctly, couldn't you just use Maths or something similar? Put your gate into ch.1 in, adjust the rise time to get the delay you want, and use the EOR as your 2nd gate.


I was also thinking this would work.
maaaks
NotHerbert wrote:
If I'm understanding this correctly, couldn't you just use Maths or something similar? Put your gate into ch.1 in, adjust the rise time to get the delay you want, and use the EOR as your 2nd gate.


Yes! I suppose this is exactly the same asthe gate -> slew -> comparator solution, just handily in one module.

Maths wins again.
moremagic
and you can patch the other side of maths up as a VCA to do the AND logic Miley Cyrus
Stereotactixxx
This is standard operating procedure for a gate delay, so that's what you need.
Dilibob
On 5u, I just take the gate signal and patch that into a q106 vco's "hard sync", then take the pulse out of that q106 to give the delayed gate. I also do things with voltage control on the q106 frequency and pulse width from a sequencor (so a 960 gives me 24 different time delta's done in sequence).
maaaks
Actually I found that simply using one side of maths wasn't quite sufficient.

In the case where the input gate event stopped before the time (i.e. I lifted my finger early), I still get a gate signal on the EOR, which I don't want.

However, using the the standard comparator patch from the maths manual combined with slew in, I get exactly the behaviour I want.
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